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| 2007 | ||
|---|---|---|
| 5 | EE | Mazen A. R. Saghir, Rawan Naous: A Configurable Multi-ported Register File Architecture for Soft Processor Cores. ARC 2007: 14-25 |
| 4 | EE | Roger Moussali, Nabil Ghanem, Mazen A. R. Saghir: Supporting multithreading in configurable soft processor cores. CASES 2007: 155-159 |
| 3 | EE | Roger Moussali, Nabil Ghanem, Mazen A. R. Saghir: Microarchitectural Enhancements for Configurable Multi-Threaded Soft Processors. FPL 2007: 782-785 |
| 2 | EE | Mazen A. R. Saghir, Mohamad El-Majzoub, Patrick Akl: Customizing the Datapath and ISA of Soft VLIW Processors. HiPEAC 2007: 276-290 |
| 1996 | ||
| 1 | Mazen A. R. Saghir, Paul Chow, Corinna G. Lee: Exploiting Dual Data-Memory Banks in Digital Signal Processors. ASPLOS 1996: 234-243 | |
| 1 | Patrick Akl | [2] |
| 2 | Paul Chow | [1] |
| 3 | Mohamad El-Majzoub | [2] |
| 4 | Nabil Ghanem | [3] [4] |
| 5 | Corinna G. Lee | [1] |
| 6 | Roger Moussali | [3] [4] |
| 7 | Rawan Naous | [5] |