| |
| 2007 | ||
|---|---|---|
| 5 | EE | Richard Ruzicka, Josef Strnadel: Test Controller Synthesis Constrained by Circuit Testability Analysis. DSD 2007: 626-633 |
| 2006 | ||
| 4 | Richard Ruzicka, Lukás Sekanina: Evolutionary circuit design in REPOMO - reconfigurable polymorphic module. Computational Intelligence 2006: 239-244 | |
| 2004 | ||
| 3 | EE | Richard Ruzicka, Pavel Tupec: Formal Approach to Synthesis of a Test Controller. ECBS 2004: 348-355 |
| 2003 | ||
| 2 | EE | Richard Ruzicka: Testable Design Verification Using Petri Nets. DSD 2003: 304-311 |
| 1 | EE | Lukás Sekanina, Richard Ruzicka: Easily Testable Image Operators: The Class of Circuits Where Evolution Beats Engineers. Evolvable Hardware 2003: 135-144 |
| 1 | Lukás Sekanina | [1] [4] |
| 2 | Josef Strnadel | [5] |
| 3 | Pavel Tupec | [3] |