2001 | ||
---|---|---|
2 | EE | P. Pant, R. K. Roy, A. Chattejee: Dual-threshold voltage assignment with transistor sizing for low power CMOS circuits. IEEE Trans. VLSI Syst. 9(2): 390-394 (2001) |
1996 | ||
1 | EE | Kaushik Roy, R. K. Roy: Low Power Design. VLSI Design 1996: 2 |
1 | A. Chattejee | [2] |
2 | P. Pant | [2] |
3 | Kaushik Roy | [1] |