A. Chattejee

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2001

2 EE P. Pant, R. K. Roy, A. Chattejee: Dual-threshold voltage assignment with transistor sizing for low power CMOS circuits. IEEE Trans. VLSI Syst. 9(2): 390-394 (2001)

2000

1 EE H. T. Nguyen, A. Chattejee: Number-splitting with shift-and-add decomposition for power and hardware optimization in linear DSP synthesis. IEEE Trans. VLSI Syst. 8(4): 419-424 (2000)

2001
2	EE	P. Pant, R. K. Roy, A. Chattejee: Dual-threshold voltage assignment with transistor sizing for low power CMOS circuits. IEEE Trans. VLSI Syst. 9(2): 390-394 (2001)
2000
1	EE	H. T. Nguyen, A. Chattejee: Number-splitting with shift-and-add decomposition for power and hardware optimization in linear DSP synthesis. IEEE Trans. VLSI Syst. 8(4): 419-424 (2000)

Coauthor Index

1 H. T. Nguyen [1]

2 P. Pant [2]

3 R. K. Roy [2]

Colors in the list of coauthors