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P. Pant

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2001
2EEP. Pant, R. K. Roy, A. Chattejee: Dual-threshold voltage assignment with transistor sizing for low power CMOS circuits. IEEE Trans. VLSI Syst. 9(2): 390-394 (2001)
1998
1EEP. Pant, V. K. De, A. Chatterjee: Simultaneous power supply, threshold voltage, and transistor size optimization for low-power operation of CMOS circuits. IEEE Trans. VLSI Syst. 6(4): 538-545 (1998)

Coauthor Index

1A. Chattejee [2]
2A. Chatterjee [1]
3V. K. De [1]
4R. K. Roy [2]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)