| |
| 2001 | ||
|---|---|---|
| 2 | EE | P. Pant, R. K. Roy, A. Chattejee: Dual-threshold voltage assignment with transistor sizing for low power CMOS circuits. IEEE Trans. VLSI Syst. 9(2): 390-394 (2001) |
| 1998 | ||
| 1 | EE | P. Pant, V. K. De, A. Chatterjee: Simultaneous power supply, threshold voltage, and transistor size optimization for low-power operation of CMOS circuits. IEEE Trans. VLSI Syst. 6(4): 538-545 (1998) |
| 1 | A. Chattejee | [2] |
| 2 | A. Chatterjee | [1] |
| 3 | V. K. De | [1] |
| 4 | R. K. Roy | [2] |