| 2005 |
|---|
| 3 | EE | Carlo Roma,
Pierluigi Daglio,
Guido De Sandre,
Marco Pasotti,
Marco Poles:
How Circuit Analysis and Yield Optimization Can Be Used To Detect Circuit Limitations Before Silicon Results.
ISQED 2005: 107-112 |
| 2003 |
|---|
| 2 | EE | Michele Borgatti,
L. Cali,
Guido De Sandre,
B. Forét,
D. Iezzi,
Francesco Lertora,
G. Muzzi,
Marco Pasotti,
Marco Poles,
Pier Luigi Rolandi:
A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory.
DAC 2003: 691-695 |
| 1 | EE | Michele Quarantelli,
Marco Poles,
Marco Pasotti,
Pier Luigi Rolandi:
A high compliance CMOS current source for low voltage applications.
ISCAS (1) 2003: 425-428 |
