| |
| 2003 | ||
|---|---|---|
| 3 | EE | Jong-Hak Hwang, Kyung-Jae Moon, Seung-Yong Park, Heung-Soo Kim: A New Construction of the Irreducible Polynomial for parallel multiplier over GF(2m). ISMVL 2003: 24- |
| 2002 | ||
| 2 | EE | Sung Il Han, Seung-Yong Park, Hyeon Kyeong Seong, Heung-Soo Kim: A Current-Mode Folding/Interpolating CMOS Analog to Quaternary Converter Using Binary to Quaternary Encoding Block. ISMVL 2002: 276-281 |
| 2000 | ||
| 1 | EE | Gi-Noung Byun, Chol-U Lee, Seung-Yong Park, Heung-Soo Kim: A Study on the Ternary Parallel Circuit Design with DCG Properties Based on the Matrix Equation. ISMVL 2000: 311-316 |
| 1 | Gi-Noung Byun | [1] |
| 2 | Sung Il Han | [2] |
| 3 | Jong-Hak Hwang | [3] |
| 4 | Heung-Soo Kim | [1] [2] [3] |
| 5 | Chol-U Lee | [1] |
| 6 | Kyung-Jae Moon | [3] |
| 7 | Hyeon Kyeong Seong | [2] |