2002 |
4 | EE | Mondira Deb Pant,
Pankaj Pant,
D. Scott Wills:
On-chip decoupling capacitor optimization using architectural level prediction.
IEEE Trans. VLSI Syst. 10(3): 319-326 (2002) |
2000 |
3 | EE | Mondira Deb Pant,
Pankaj Pant,
D. Scott Wills,
Vivek Tiwari:
Inductive Noise Reduction at the Architectural Level.
VLSI Design 2000: 162-167 |
1999 |
2 | EE | Lucian Codrescu,
Mondira Deb Pant,
Tarek M. Taha,
John Eble,
D. Scott Wills,
James D. Meindl:
Exploring Microprocessor Architectures for Gigascale Integration.
ARVLSI 1999: 242-255 |
1 | EE | Mondira Deb Pant,
Pankaj Pant,
D. Scott Wills,
Vivek Tiwari:
An architectural solution for the inductive noise problem due to clock-gating.
ISLPED 1999: 255-257 |