2008 |
39 | EE | Mika Laiho,
Jonne Poikonen,
Ari Paasio,
Kari Halonen:
Centroiding and classification of objects using a processor array with a scalable region of interest.
ISCAS 2008: 1604-1607 |
2007 |
38 | EE | Lauri Koskinen,
Joona Marku,
Ari Paasio,
Kari Halonen:
Architecture for Analog Variable Block-Size Motion Estimation.
ICIP (2) 2007: 493-496 |
37 | EE | Kati Virtanen,
Janne Maunu,
Jonne Poikonen,
Ari Paasio:
A 12-bit Current-Steering DAC with Calibration by Combination Selection.
ISCAS 2007: 1469-1472 |
2006 |
36 | EE | Olli Lahdenoja,
Esa Alhoniemi,
Mika Laiho,
Ari Paasio:
A Shape-Preserving Non-parametric Symmetry Transform.
ICPR (2) 2006: 373-377 |
35 | EE | Olli Lahdenoja,
Janne Maunu,
Mika Laiho,
Ari Paasio:
A massively parallel algorithm for local binary pattern based face recognition.
ISCAS 2006 |
34 | EE | Janne Maunu,
Mikko Pänkäälä,
Joona Marku,
Jonne Poikonen,
Mika Laiho,
Ari Paasio:
Current source calibration by combination selection of minimum sized devices.
ISCAS 2006 |
33 | EE | Mika Laiho,
Ari Paasio,
Victor M. Brea:
Effect of mismatch on the reliability of binary-programmable CNNs.
ISCAS 2006 |
32 | EE | Kati Virtanen,
Mikko Pänkäälä,
Mika Laiho,
Ari Paasio:
Implementation of an asynchronous current-mode ADC with adaptive quantization.
ISCAS 2006 |
31 | EE | Jonne Poikonen,
Ari Paasio:
On the topographic equivalence between voltage mode and current mode ranked order filters for array processors.
ISCAS 2006 |
30 | EE | Tero Koivisto,
Teemu Peltonen,
Meigen Shen,
Esa Tjukanoff,
Ari Paasio:
Sine wave as a correlating signal for UWB radio.
ISCAS 2006 |
29 | EE | Mikko Pänkäälä,
Kati Virtanen,
Ari Paasio:
An Analog 2-D DCT Processor.
IEEE Trans. Circuits Syst. Video Techn. 16(10): 1209-1216 (2006) |
2005 |
28 | EE | Olli Lahdenoja,
Mika Laiho,
Ari Paasio:
Reducing the feature vector length in local binary pattern based face recognition.
ICIP (2) 2005: 914-917 |
27 | EE | Jonne Poikonen,
Ari Paasio:
Rank identification for an analog ranked order filter.
ISCAS (3) 2005: 2819-2822 |
26 | EE | Kati Virtanen,
Mikko Pänkäälä,
Ari Paasio:
A current-mode ADC with adaptive quantization.
ISCAS (4) 2005: 3115-3118 |
25 | EE | Victor M. Brea,
Mika Laiho,
David López Vilariño,
Ari Paasio,
Diego Cabello:
A one-quadrant discrete-time cellular neural network architecture for pixel-level snakes: B/W processing.
ISCAS (4) 2005: 3922-3925 |
24 | EE | Laura Vesalainen,
Jonne Poikonen,
Ari Paasio:
A Gray-coded digital-to-analog converter for a mixed-mode processor array.
ISCAS (4) 2005: 3930-3933 |
23 | EE | Mika Laiho,
Ari Paasio,
Jacek Flak,
Kari Halonen:
Template design for binary-programmable cellular nonlinear networks.
ISCAS (4) 2005: 3938-3941 |
22 | EE | Olli Lahdenoja,
Jonne Poikonen,
Ari Paasio:
Effect of mismatch on a ranked-order extractor array [image processing applications].
ISCAS (4) 2005: 4118-4121 |
21 | EE | Lauri Koskinen,
Kari Halonen,
Ari Paasio:
Parallel processor algorithm for variable block-size computation at low bitrates [video coding applications].
ISCAS (4) 2005: 4122-4125 |
20 | EE | Victor M. Brea,
Mika Laiho,
David López Vilariño,
Ari Paasio,
Diego Cabello:
A one-quadrant discrete-time cellular neural network CMOS chip for pixel-level snakes.
ISCAS (6) 2005: 5798-5801 |
19 | EE | Mika Laiho,
Ari Paasio:
Dynamically coupled multi-layer mixed-mode CNN.
ISCAS (6) 2005: 5810-5813 |
18 | EE | Kati Virtanen,
N. Pankaala,
Ari Paasio:
Compensation of errors generated by an analog 2D DCT.
ISCAS (6) 2005: 6272-6275 |
17 | EE | Lauri Koskinen,
Ari Paasio,
Kari Halonen:
Motion estimation computational complexity reduction with CNN shape segmentation.
IEEE Trans. Circuits Syst. Video Techn. 15(6): 771-777 (2005) |
2004 |
16 | EE | Mikko Pänkäälä,
Jonne Poikonen,
Laura Vesalainen,
Ari Paasio:
Realization of an analog current-mode 2D DCT.
ISCAS (1) 2004: 745-748 |
15 | EE | Ari Paasio,
Jacek Flak,
Mika Laiho,
Kari Halonen:
High density VLSI implementation of a bipolar CNN with reduced programmability.
ISCAS (3) 2004: 21-24 |
14 | EE | Laura Vesalainen,
Jonne Poikonen,
Mikko Pänkäälä,
Ari Paasio:
A gray-code current-mode ADC for mixed-mode cellular computer.
ISCAS (3) 2004: 81-84 |
13 | EE | Mika Laiho,
Ari Paasio,
Kari Halonen:
Improved cell core for a mixed-mode polynomial CNN.
ISCAS (3) 2004: 93-96 |
12 | | Asko Kananen,
Mika Laiho,
Kari Halonen,
Ari Paasio:
N /spl times/ 16 cellular test chips for low-pass filtering large images.
ISCAS (5) 2004: 461-464 |
11 | | Lauri Koskinen,
Ari Paasio,
Kari Halonen:
3-neighborhood motion estimation in CNN silicon architectures.
ISCAS (5) 2004: 708-711 |
2003 |
10 | EE | Ari Paasio,
Mika Laiho,
Asko Kananen,
Kari Halonen,
Jonne Poikonen:
A 32×32 cellular test chip targeting new functionalities.
ISCAS (3) 2003: 506-509 |
9 | EE | Jonne Poikonen,
Ari Paasio:
An area-efficient full-wave current rectifier for analog array processing.
ISCAS (5) 2003: 757-760 |
8 | EE | Mika Laiho,
Ari Paasio,
Asko Kananen,
Kari Halonen:
Realization of Couplings in a Polynomial Type Mixed-Mode Cellular Neural Network.
Int. J. Neural Syst. 13(6): 443-452 (2003) |
2002 |
7 | EE | Mika Laiho,
Ari Paasio,
Asko Kananen,
Kari Halonen:
Cell and network level design of a mixed-mode CNN.
ISCAS (1) 2002: 621-624 |
6 | EE | Victor M. Brea,
David López Vilariño,
Ari Paasio,
Diego Cabello:
Implementation oriented theory design issues on the DTCNN template generation.
ISCAS (3) 2002: 101-104 |
5 | EE | Lauri Koskinen,
Ari Paasio,
Mika Laiho,
Kari Halonen:
Effect of CNN shape segmentation on MPEG-4 shape bit-rate.
ISCAS (4) 2002: 552-555 |
2001 |
4 | EE | Mika Laiho,
Ari Paasio,
Asko Kananen,
Kari Halonen:
Discrete time analog polynomial type CNN with digital state.
ISCAS (3) 2001: 497-500 |
1999 |
3 | EE | Ari Paasio,
Asko Kananen,
Kari Halonen:
Very fast and compact fixed template CNN realizations for B/W processing.
ISCAS (5) 1999: 595-598 |
2 | EE | Ari Paasio,
Asko Kananen,
Kari Halonen,
Veikko Porra:
A QCIF Resolution Binary I/O CNN-UM Chip.
VLSI Signal Processing 23(2-3): 281-290 (1999) |
1994 |
1 | | Ari Paasio,
Kari Halonen,
Veikko Porra:
CMOS Implementation of Associative Memory Using Cellular Neural Network Having Adjustable Template Coefficients.
ISCAS 1994: 487-490 |