| 1999 |
|---|
| 8 | EE | Kenneth L. Shepard,
Vinod Narayanan,
Ron Rose:
Harmony: static noise analysis of deep submicron digital integrated circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(8): 1132-1150 (1999) |
| 1998 |
|---|
| 7 | EE | Kenneth L. Shepard,
Vinod Narayanan:
Conquering Noise in Deep-Submicron Digital ICs.
IEEE Design & Test of Computers 15(1): 51-62 (1998) |
| 1997 |
|---|
| 6 | EE | Kenneth L. Shepard,
Vinod Narayanan,
Peter C. Elmendorf,
Gutuan Zheng:
Global harmony: coupled noise analysis for full-chip RC interconnect networks.
ICCAD 1997: 139-146 |
| 1996 |
|---|
| 5 | EE | Vinod Narayanan,
Barbara A. Chappell,
Bruce M. Fleischer:
Static timing analysis for self resetting circuits.
ICCAD 1996: 119-126 |
| 4 | EE | Kenneth L. Shepard,
Vinod Narayanan:
Noise in deep submicron digital design.
ICCAD 1996: 524-531 |
| 1992 |
|---|
| 3 | EE | Vinod Narayanan,
Vijay Pitchumani:
Fault simulation on massively parallel SIMD machines algorithms, implementations and results.
J. Electronic Testing 3(1): 79-92 (1992) |
| 1989 |
|---|
| 2 | EE | Vinod Narayanan,
Vijay Pitchumani:
A Massively Parallel Algorithm for Fault Simulation on the Connection Machine.
DAC 1989: 734-737 |
| 1988 |
|---|
| 1 | | Vinod Narayanan,
Vijay Pitchumani:
: A Parallel Algorithm for Fault Simulation on the Connection Machine.
ITC 1988: 89-93 |
