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Øivind Næss

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2006
10EEØivind Næss, Yngvar Berg: Switched pseudo floating-gate reconfigurable linear threshold elements. ISCAS 2006
2004
9EEYngvar Berg, Snorre Aunet, Øivind Næss, Omid Mirmotahari: Basic Multiple-Valued Functions Using Recharge CMOS Logic. ISMVL 2004: 346-351
2003
8EEØivind Næss, Espen A. Olsen, Yngvar Berg, Tor Sverre Lande: A low voltage second order biquad using pseudo floating-gate transistors. ISCAS (1) 2003: 125-128
7EEYngvar Berg, Snorre Aunet, Øivind Næss, Johannes Goplen Lomsdalen, Mats Høvin: Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers. ISCAS (1) 2003: 345-348
2002
6EEYngvar Berg, Snorre Aunet, Øivind Næss, O. Hagen, Mats Høvin: A novel floating-gate multiple-valued CMOS full-adder. ISCAS (1) 2002: 877-880
5EEØivind Næss, Yngvar Berg: Tunable floating-gate low-voltage transconductor. ISCAS (4) 2002: 663-666
4EEYngvar Berg, Øivind Næss, Snorre Aunet, Renè Jensen, Mats Høvin: Novel floating-gate multiple-valued signal to binary signal converters for multiple-valued CMOS logic. ISCAS (5) 2002: 385-388
2001
3EEYngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin: Extreme low-voltage floating-gate CMOS transconductance amplifier. ISCAS (1) 2001: 37-40
2EEYngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin: Floating-gate CMOS differential analog inverter for ultra low-voltage applications. ISCAS (1) 2001: 9-12
1EEYngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin: Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion. ISCAS (4) 2001: 838-841

Coauthor Index

1Snorre Aunet [1] [2] [3] [4] [6] [7] [9]
2Yngvar Berg [1] [2] [3] [4] [5] [6] [7] [8] [9] [10]
3Henning Gundersen [3]
4O. Hagen [6]
5Mats Erling Høvin (Mats Høvin) [1] [2] [3] [4] [6] [7]
6Renè Jensen [4]
7Tor Sverre Lande [8]
8Johannes Goplen Lomsdalen [7]
9Omid Mirmotahari [9]
10Espen A. Olsen [8]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)