| 2006 |
|---|
| 10 | EE | Øivind Næss,
Yngvar Berg:
Switched pseudo floating-gate reconfigurable linear threshold elements.
ISCAS 2006 |
| 2004 |
|---|
| 9 | EE | Yngvar Berg,
Snorre Aunet,
Øivind Næss,
Omid Mirmotahari:
Basic Multiple-Valued Functions Using Recharge CMOS Logic.
ISMVL 2004: 346-351 |
| 2003 |
|---|
| 8 | EE | Øivind Næss,
Espen A. Olsen,
Yngvar Berg,
Tor Sverre Lande:
A low voltage second order biquad using pseudo floating-gate transistors.
ISCAS (1) 2003: 125-128 |
| 7 | EE | Yngvar Berg,
Snorre Aunet,
Øivind Næss,
Johannes Goplen Lomsdalen,
Mats Høvin:
Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers.
ISCAS (1) 2003: 345-348 |
| 2002 |
|---|
| 6 | EE | Yngvar Berg,
Snorre Aunet,
Øivind Næss,
O. Hagen,
Mats Høvin:
A novel floating-gate multiple-valued CMOS full-adder.
ISCAS (1) 2002: 877-880 |
| 5 | EE | Øivind Næss,
Yngvar Berg:
Tunable floating-gate low-voltage transconductor.
ISCAS (4) 2002: 663-666 |
| 4 | EE | Yngvar Berg,
Øivind Næss,
Snorre Aunet,
Renè Jensen,
Mats Høvin:
Novel floating-gate multiple-valued signal to binary signal converters for multiple-valued CMOS logic.
ISCAS (5) 2002: 385-388 |
| 2001 |
|---|
| 3 | EE | Yngvar Berg,
Snorre Aunet,
Øivind Næss,
Henning Gundersen,
Mats Høvin:
Extreme low-voltage floating-gate CMOS transconductance amplifier.
ISCAS (1) 2001: 37-40 |
| 2 | EE | Yngvar Berg,
Snorre Aunet,
Øivind Næss,
Mats Høvin:
Floating-gate CMOS differential analog inverter for ultra low-voltage applications.
ISCAS (1) 2001: 9-12 |
| 1 | EE | Yngvar Berg,
Snorre Aunet,
Øivind Næss,
Mats Høvin:
Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion.
ISCAS (4) 2001: 838-841 |
