![]() |
| 2001 | ||
|---|---|---|
| 3 | EE | A. Maxim, B. Scott, E. Schneider, M. Hagge, S. Chacko, Dan Stiurca: Sample-reset loop filter architecture for process independent and ripple-pole-less low jitter CMOS charge-pump PLLs. ISCAS (4) 2001: 766-769 |
| 2 | EE | A. Maxim, M. Gheorghe: A novel physical based model of deep-submicron CMOS transistors mismatch for Monte Carlo SPICE simulation. ISCAS (5) 2001: 511-514 |
| 1999 | ||
| 1 | EE | A. Maxim, D. Andreu, M. Cousineau, J. Boucher: A novel SPICE behavioral macromodel of operational amplifiers including a high accuracy description of frequency characteristics. ISCAS (6) 1999: 278-281 |
| 1 | D. Andreu | [1] |
| 2 | J. Boucher | [1] |
| 3 | S. Chacko | [3] |
| 4 | M. Cousineau | [1] |
| 5 | M. Gheorghe | [2] |
| 6 | M. Hagge | [3] |
| 7 | E. Schneider | [3] |
| 8 | B. Scott | [3] |
| 9 | Dan Stiurca | [3] |