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Dan Stiurca

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2005
3EEDan Stiurca: A fully differential line driver with on-chip calibrated source termination for gigabit and fast Ethernet in a standard 0.13µ CMOS process. ISCAS (3) 2005: 2176-2179
2001
2EEA. Maxim, B. Scott, E. Schneider, M. Hagge, S. Chacko, Dan Stiurca: Sample-reset loop filter architecture for process independent and ripple-pole-less low jitter CMOS charge-pump PLLs. ISCAS (4) 2001: 766-769
1994
1 Dan Stiurca: Systematic Generation of Current-Mode Second Order RC Oscillators. ISCAS 1994: 393-396

Coauthor Index

1S. Chacko [2]
2M. Hagge [2]
3A. Maxim [2]
4E. Schneider [2]
5B. Scott [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)