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1998 | ||
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2 | EE | Yoshio Kameda, Stanislav Polonsky, Masaaki Maezawa, Takashi Nanya: Primitive-Level Pipelining Method on Delay-Insensitive Model for RSFQ Pulse-Driven Logic. ASYNC 1998: 262-273 |
1 | EE | Teruhiko Yamada, Tsuneto Hanashima, Yasuhiro Suemori, Masaaki Maezawa: On Testing of Josephson Logic Circuits Consisting of RSFQ Dual-Rail Logic Gates. Asian Test Symposium 1998: 222-227 |
1 | Tsuneto Hanashima | [1] |
2 | Yoshio Kameda | [2] |
3 | Takashi Nanya | [2] |
4 | Stanislav Polonsky | [2] |
5 | Yasuhiro Suemori | [1] |
6 | Teruhiko Yamada | [1] |