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Yu-Sheng Lu

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2008
1EEChia-Ming Chang, Shih-Hsu Huang, Yuan-Kai Ho, Jia-Zong Lin, Hsin-Po Wang, Yu-Sheng Lu: Type-matching clock tree for zero skew clock gating. DAC 2008: 714-719

Coauthor Index

1Chia-Ming Chang [1]
2Yuan-Kai Ho [1]
3Shih-Hsu Huang [1]
4Jia-Zong Lin [1]
5Hsin-Po Wang [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)