| 2007 |
|---|
| 4 | EE | Jiayi Liu,
Sheqin Dong,
Yuchun Ma,
Di Long,
Xianlong Hong:
Thermal-driven Symmetry Constraint for Analog Layout with CBL Representation.
ASP-DAC 2007: 191-196 |
| 2006 |
|---|
| 3 | EE | Di Long,
Xianlong Hong,
Sheqin Dong:
Signal-path driven partition and placement for analog circuit.
ASP-DAC 2006: 694-699 |
| 2005 |
|---|
| 2 | EE | Di Long,
Xianlong Hong,
Sheqin Dong:
Optimal two-dimension common centroid layout generation for MOS transistors unit-circuit.
ISCAS (3) 2005: 2999-3002 |
| 2003 |
|---|
| 1 | EE | Rui Liu,
Sheqin Dong,
Xianlong Hong,
Di Long,
Jun Gu:
Algorithms for analog VLSI 2D stack generation and block merging.
ISCAS (4) 2003: 716-719 |
