| |
| 2007 | ||
|---|---|---|
| 3 | EE | Catherine L. Zhou, Wai-Chung Tang, Wing-Hang Lo, Yu-Liang Wu: How Much Can Logic Perturbation Help from Netlist to Final Routing for FPGAs. DAC 2007: 922-927 |
| 2 | EE | Wai-Chung Tang, Wing-Hang Lo, Yu-Liang Wu: Further Improve Excellent Graph-Based FPGA Technology Mapping by Rewiring. ISCAS 2007: 1049-1052 |
| 2005 | ||
| 1 | EE | Wai-Chung Tang, Wing-Hang Lo, Yu-Liang Wu, Shih-Chieh Chang: FPGA technology mapping optimization by rewiring algorithms. ISCAS (6) 2005: 5653-5656 |
| 1 | Shih-Chieh Chang | [1] |
| 2 | Wai-Chung Tang | [1] [2] [3] |
| 3 | Yu-Liang Wu (David Yu-Liang Wu) | [1] [2] [3] |
| 4 | Catherine L. Zhou | [3] |