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Wing-Hang Lo

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2007
3EECatherine L. Zhou, Wai-Chung Tang, Wing-Hang Lo, Yu-Liang Wu: How Much Can Logic Perturbation Help from Netlist to Final Routing for FPGAs. DAC 2007: 922-927
2EEWai-Chung Tang, Wing-Hang Lo, Yu-Liang Wu: Further Improve Excellent Graph-Based FPGA Technology Mapping by Rewiring. ISCAS 2007: 1049-1052
2005
1EEWai-Chung Tang, Wing-Hang Lo, Yu-Liang Wu, Shih-Chieh Chang: FPGA technology mapping optimization by rewiring algorithms. ISCAS (6) 2005: 5653-5656

Coauthor Index

1Shih-Chieh Chang [1]
2Wai-Chung Tang [1] [2] [3]
3Yu-Liang Wu (David Yu-Liang Wu) [1] [2] [3]
4Catherine L. Zhou [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)