| |
| 1993 | ||
|---|---|---|
| 2 | Ming-Hwa Sheu, Jhing-Fa Wang, Jau-Yien Lee, Lian-Ying Liu: An Expandable Chip Desing for Gray-scale Morphological Operations. ISCAS 1993: 1563-1566 | |
| 1 | Ming-Hwa Sheu, Jau-Yien Lee, Jhing-Fa Wang, An-Nan Suen, Lian-Ying Liu: A High Throughput-Rate Architecture for 8*8 2-D DCT. ISCAS 1993: 1578-1590 | |
| 1 | Jau-Yien Lee | [1] [2] |
| 2 | Ming-Hwa Sheu | [1] [2] |
| 3 | An-Nan Suen | [1] |
| 4 | Jhing-Fa Wang | [1] [2] |