| 2008 |
|---|
| 4 | EE | Su-Hon Lin,
Ming-Hwa Sheu:
Area-Time Efficient Modulo 2n - 1 Adder Design Using Hybrid Carry Selection.
IEICE Transactions 91-D(2): 361-362 (2008) |
| 3 | EE | Su-Hon Lin,
Ming-Hwa Sheu,
Chao-Hsiang Wang:
Efficient VLSI Design of Residue-to-Binary Converter for the Moduli Set (2n, 2n+1 - 1, 2n - 1).
IEICE Transactions 91-D(7): 2058-2060 (2008) |
| 2006 |
|---|
| 2 | EE | Su-Hon Lin,
Ming-Hwa Sheu,
Jing-Shiun Lin,
Wen-Tsai Sheu:
Efficient VLSI Design for RNS Reverse Converter Based on New Moduli Set (2n-1, 2n+1, 22n+1).
APCCAS 2006: 2020-2023 |
| 2002 |
|---|
| 1 | EE | Ming-Hwa Sheu,
Su-Hon Lin:
Fast design approach for implementing the approximate squaring function.
APCCAS (2) 2002: 25-29 |
