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Hsiu-Feng Lin

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2003
4EEHao-Yung Lo, Hsiu-Feng Lin, Chichyang Chen, Jenshiuh Liu, Chia-Cheng Liu: Built-in Test with Modified-Booth High-Speed Pipelined Multipliers and Dividers. J. Electronic Testing 19(3): 245-269 (2003)
1996
3EEHao-Yung Lo, Hsiu-Feng Lin, Yue-Yuan Ho: Logarithmic Conversion by Four Partitioned Hybrid-ROMs. ISPAN 1996: 550-552
1995
2 Hao-Yung Lo, Hsiu-Feng Lin, Kuen-Shiuh Yang: A New Method of Implementation of VLSI CORDIC for Sine and Cosine Computation. ISCAS 1995: 1984-1987
1994
1EEHao-Yung Lo, Hsiu-Feng Lin, Chiang-Shiang Wan: Hybrid ROM Strategy (H-ROM) for Conversion Between Binary Numbers and Logarithms. J. Inf. Sci. Eng. 10(1): 51-69 (1994)

Coauthor Index

1Chichyang Chen [4]
2Yue-Yuan Ho [3]
3Chia-Cheng Liu [4]
4Jenshiuh Liu [4]
5Hao-Yung Lo [1] [2] [3] [4]
6Chiang-Shiang Wan [1]
7Kuen-Shiuh Yang [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)