| 2007 |
| 13 | EE | Yong-Min Lee,
Chang-Seok Choi,
Seung-Gon Hwang,
Hyun Dong Kim,
Chul Hong Min,
Jae-Hyun Park,
Hanho Lee,
Tae-Seon Kim,
Chong Ho Lee:
Ubiquitous Evolvable Hardware System for Heart Disease Diagnosis Applications.
ARC 2007: 283-292 |
| 12 | EE | Oh Hyuk Kwon,
Kyu Yrul Wang,
Ji Yoon Kim,
Jeahyun Park,
Duck Jin Chung,
Chong Ho Lee:
DNA Inspired Digital Signal Pattern Matching Algorithm.
FBIT 2007: 753-756 |
| 11 | EE | Jin Wang,
Chang Hao Piao,
Chong Ho Lee:
FPGA Implementation of Evolvable Characters Recognizer with Self-adaptive Mutation Rates.
ICANNGA (1) 2007: 286-295 |
| 10 | EE | Jin Wang,
Chang Hao Piao,
Chong Ho Lee:
Implementing Multi-VRC Cores to Evolve Combinational Logic Circuits in Parallel.
ICES 2007: 23-34 |
| 2006 |
| 9 | EE | Yeong-Jae Oh,
Hanho Lee,
Chong Ho Lee:
Dynamic Partial Reconfigurable FIR Filter Design.
ARC 2006: 30-35 |
| 8 | EE | Yeong-Jae Oh,
Hanho Lee,
Chong Ho Lee:
A reconfigurable FIR filter design using dynamic partial reconfiguration.
ISCAS 2006 |
| 7 | EE | Jae Woo Wee,
Tae-Seon Kim,
Sung Soo Dong,
Chong Ho Lee:
Nonlinear Channel Equalization Using Concurrent Support Vector Machine Processor.
ISNN (2) 2006: 120-127 |
| 6 | EE | Jin Wang,
Chong Ho Lee:
Introducing Partitioning Training Set Strategy to Intrinsic Incremental Evolution.
MICAI 2006: 272-282 |
| 5 | EE | Jin Wang,
Chong Ho Lee:
Complete FPGA Implemented Evolvable Image Filters.
MICAI 2006: 767-777 |
| 4 | EE | In Gab Yu,
Yong-min Lee,
Seong Won Yeo,
Chong Ho Lee:
Design on Supervised / Unsupervised Learning Reconfigurable Digital Neural Network Structure.
PRICAI 2006: 1201-1205 |
| 2005 |
| 3 | EE | Jin Wang,
Je Kyo Jung,
Yong-min Lee,
Chong Ho Lee:
Using Reconfigurable Architecture-Based Intrinsic Incremental Evolution to Evolve a Character Classification System.
CIS (1) 2005: 216-223 |
| 2004 |
| 2 | EE | Jae Woo Wee,
Chong Ho Lee:
Concurrent Support Vector Machine Processor for Disease Diagnosis.
ICONIP 2004: 1129-1134 |
| 1991 |
| 1 | | Kye Hyun Kim,
Chong Ho Lee,
Bo Yeon Kim,
Hee Yeung Hwang:
Neural optimization network for minimum-via layer assignment.
Neurocomputing 3(1): 15-27 (1991) |