Chang Hao Piao

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2007

2 EE Jin Wang, Chang Hao Piao, Chong Ho Lee: FPGA Implementation of Evolvable Characters Recognizer with Self-adaptive Mutation Rates. ICANNGA (1) 2007: 286-295

1 EE Jin Wang, Chang Hao Piao, Chong Ho Lee: Implementing Multi-VRC Cores to Evolve Combinational Logic Circuits in Parallel. ICES 2007: 23-34

2007
2	EE	Jin Wang, Chang Hao Piao, Chong Ho Lee: FPGA Implementation of Evolvable Characters Recognizer with Self-adaptive Mutation Rates. ICANNGA (1) 2007: 286-295
1	EE	Jin Wang, Chang Hao Piao, Chong Ho Lee: Implementing Multi-VRC Cores to Evolve Combinational Logic Circuits in Parallel. ICES 2007: 23-34

Coauthor Index

1 Chong Ho Lee [1] [2]

2 Jin Wang [1] [2]