dblp.uni-trier.dewww.uni-trier.de

P. Rajesh Kumar

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2007
3EEP. Rajesh Kumar, K. Sridharan: VLSI-Efficient Scheme and FPGA Realization for Robotic Mapping in a Dynamic Environment. IEEE Trans. VLSI Syst. 15(1): 118-123 (2007)
2006
2EET. K. Priya, P. Rajesh Kumar, K. Sridharan: A hardware-efficient scheme and FPGA realization for computation of single pair shortest path for a mobile automaton. Microprocessors and Microsystems 30(7): 413-424 (2006)
1EEP. Rajesh Kumar, K. Sridharan, S. Srinivasan: A parallel algorithm, architecture and FPGA realization for landmark determination and map construction in a planar unknown environment. Parallel Computing 32(3): 205-221 (2006)

Coauthor Index

1T. K. Priya [2]
2K. Sridharan [1] [2] [3]
3S. Srinivasan [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)