| |
| 2007 | ||
|---|---|---|
| 3 | EE | Daisuke Kosaka, Makoto Nagata, Yoshitaka Murasaka, Atsushi Iwata: Chip-Level Substrate Coupling Analysis with Reference Structures for Verification. IEICE Transactions 90-A(12): 2651-2660 (2007) |
| 2 | EE | Daisuke Kosaka, Makoto Nagata, Yoshitaka Murasaka, Atsushi Iwata: Evaluation of Isolation Structures against High-Frequency Substrate Coupling in Analog/Mixed-Signal Integrated Circuits. IEICE Transactions 90-A(2): 380-387 (2007) |
| 2006 | ||
| 1 | EE | Daisuke Kosaka, Makoto Nagata: Equivalent circuit modeling of guard ring structures for evaluation of substrate crosstalk isolation. ASP-DAC 2006: 677-682 |
| 1 | Atsushi Iwata | [2] [3] |
| 2 | Yoshitaka Murasaka | [2] [3] |
| 3 | Makoto Nagata | [1] [2] [3] |