| |
| 2008 | ||
|---|---|---|
| 4 | EE | Sotaro Kawata, Akira Hirose: Frequency-Multiplexing Ability of Complex-Valued Hebbian Learning in Logic Gates. Int. J. Neural Syst. 18(2): 173-184 (2008) |
| 2006 | ||
| 3 | EE | Ben A. Abderazek, Sotaro Kawata, Masahiro Sowa: Design and architecture for an embedded 32-bit QueueCore. J. Embedded Computing 2(2): 191-205 (2006) |
| 2005 | ||
| 2 | EE | Ben A. Abderazek, Sotaro Kawata, Tsutomu Yoshinaga, Masahiro Sowa: Modular Design Structure and High-Level Prototyping for Novel Embedded Processor Core. EUC 2005: 340-349 |
| 1 | EE | Md. Musfiquzzaman Akanda, Ben A. Abderazek, Sotaro Kawata, Masahiro Sowa: An Efficient Dynamic Switching Mechanism (DSM) for Hybrid Processor Architecture. EUC 2005: 77-86 |
| 1 | Ben A. Abderazek | [1] [2] [3] |
| 2 | Md. Musfiquzzaman Akanda | [1] |
| 3 | Akira Hirose | [4] |
| 4 | Masahiro Sowa | [1] [2] [3] |
| 5 | Tsutomu Yoshinaga | [2] |