Tso-Bing Juang

2008
4	EE	Tso-Bing Juang, Sheng-Hung Chen, Shin-Mao Li: A novel VLSI iterative divider architecture for fast quotient generation. ISCAS 2008: 3358-3361
2006
3	EE	Tso-Bing Juang: Area/Delay Efficient Recoding Methods for Parallel CORDIC Rotations. APCCAS 2006: 1539-1542
2005
2	EE	Tso-Bing Juang, Shen-Fu Hsiao, Ming-Yu Tsai, Jenq-Shiun Jan: A Cell-Driven Multiplier Generator with Delay Optimization of Partial Products Compression and an Efficient Partition Technique for the Final Addition. IEICE Transactions 88-D(7): 1464-1471 (2005)
2002
1	EE	Tso-Bing Juang, Jeng-Hsiun Jan, Ming-Yu Tsai, Shen-Fu Hsiao: Partition methodology for the final adder in a tree-structure parallel multiplier generator. APCCAS (1) 2002: 471-474

Coauthor Index

1	Sheng-Hung Chen	[4]
2	Shen-Fu Hsiao	[1] [2]
3	Jeng-Hsiun Jan	[1]
4	Jenq-Shiun Jan	[2]
5	Shin-Mao Li	[4]
6	Ming-Yu Tsai	[1] [2]

Colors in the list of coauthors