Sheng-Hung Chen
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2008
1
EE
Tso-Bing Juang
, Sheng-Hung Chen,
Shin-Mao Li
: A novel VLSI iterative divider architecture for fast quotient generation.
ISCAS 2008
: 3358-3361
Coauthor
Index
1
Tso-Bing Juang
[
1
]
2
Shin-Mao Li
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
