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| 2004 | ||
|---|---|---|
| 2 | Rei-Chin Ju, Jia-Wei Chen, Jiun-In Guo, Tien-Fu Chen: A parameterized power-aware IP core generator for the 2-D 8×8 DCT/IDCT. ISCAS (2) 2004: 769-772 | |
| 1 | EE | Jiun-In Guo, Rei-Chin Ju, Jia-Wei Chen: An efficient 2-D DCT/IDCT core design using cyclic convolution and adder-based realization. IEEE Trans. Circuits Syst. Video Techn. 14(4): 416-428 (2004) |
| 1 | Jia-Wei Chen | [1] [2] |
| 2 | Tien-Fu Chen | [2] |
| 3 | Jiun-In Guo | [1] [2] |