| 2005 |
|---|
| 4 | EE | Grzegorz Blakiewicz,
Marcin Jeske,
Malgorzata Chrzanowska-Jeske,
Jin S. Zhang:
Substrate noise modeling in early floorplanning of MS-SOCs.
ASP-DAC 2005: 819-823 |
| 2004 |
|---|
| 3 | | Marcin Jeske,
Grzegorz Blakiewicz,
Malgorzata Chrzanowska-Jeske,
Benyi Wang:
Substrate noise-aware floorplanning for mixed-signal SOCs.
ISCAS (2) 2004: 445-448 |
| 2003 |
|---|
| 2 | EE | Yu Xia,
Malgorzata Chrzanowska-Jeske,
Benyi Wang,
Marcin Jeske:
Using a Distributed Rectangle Bin-Packing Approach for Core-based SoC Test Scheduling with Power Constraints.
ICCAD 2003: 100-106 |
| 1 | EE | Faran Rafiq,
Malgorzata Chrzanowska-Jeske,
Hannah Honghua Yang,
Marcin Jeske,
Naveed A. Sherwani:
Integrated floorplanning with buffer/channel insertion for bus-based designs.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(6): 730-741 (2003) |
