2004 | ||
---|---|---|
3 | EE | Ireneusz Janiszewski, Hermann Meuth, Bernhard Hoppe: FPGA-Efficient Hybrid LUT/CORDIC Architecture. FPL 2004: 933-937 |
2002 | ||
2 | Ireneusz Janiszewski, Bernhard Hoppe, Hermann Meuth: Modelling and Simulation in the Design Flow for Numerically Controlled Oscillators. ESM 2002: 625-629 | |
2001 | ||
1 | EE | Ireneusz Janiszewski, Bernhard Hoppe, Hermann Meuth: VHDL-Based Design and Design Methodology for Reusable High Performance Direct Digital Frequency Synthesizers. DAC 2001: 573-578 |
1 | Bernhard Hoppe | [1] [2] [3] |
2 | Hermann Meuth | [1] [2] [3] |