1997 | ||
---|---|---|
4 | EE | H. Goto, S. Nakamura, K. Iwasaki: Experimental fault analysis of 1 Mb SRAM chips. VTS 1997: 31-36 |
3 | EE | K. Iwasaki: Polytopes and the Mean Value Property. Discrete & Computational Geometry 17(2): 163-189 (1997) |
1990 | ||
2 | EE | K. Iwasaki, F. Arakawa: An analysis of the aliasing probability of multiple-input signature registers in the case of a 2m-ary symmetric channel. IEEE Trans. on CAD of Integrated Circuits and Systems 9(4): 427-438 (1990) |
1988 | ||
1 | EE | K. Iwasaki: Analysis and proposal of signature circuits for LSI testing. IEEE Trans. on CAD of Integrated Circuits and Systems 7(1): 84-90 (1988) |
1 | F. Arakawa | [2] |
2 | H. Goto | [4] |
3 | S. Nakamura | [4] |