| |
| 2005 | ||
|---|---|---|
| 1 | EE | Niichi Itoh, Yasumasa Tsukamoto, Takeshi Shibagaki, Koji Nii, Hidehiro Takata, Hiroshi Makino: A 32×24-bit multiplier-accumulator with advanced rectangular styled Wallace-tree structure. ISCAS (1) 2005: 73-76 |
| 1 | Hiroshi Makino | [1] |
| 2 | Koji Nii | [1] |
| 3 | Takeshi Shibagaki | [1] |
| 4 | Hidehiro Takata | [1] |
| 5 | Yasumasa Tsukamoto | [1] |