| 2007 |
|---|
| 7 | EE | Marek Gorgon,
Piotr Pawlik,
Miroslaw Jablonski,
Jaromir Przybylo:
FPGA-based Road Traffic Videodetector.
DSD 2007: 412-419 |
| 6 | EE | Marek Gorgon,
Piotr Pawlik,
Miroslaw Jablonski,
Jaromir Przybylo:
PixelStreams-based implementation of videodetector.
FCCM 2007: 321-322 |
| 2006 |
|---|
| 5 | EE | Slawomir Cichon,
Marek Gorgon,
Miroslaw Pac:
Handel-C Design Enhancement for FPGA-Based DV Decoder.
ARC 2006: 128-133 |
| 4 | EE | Marek Gorgon,
Mateusz Wrzesinski:
Neural Network Implementation in Reprogrammable FPGA Devices - An Example for MLP.
ICAISC 2006: 19-28 |
| 2005 |
|---|
| 3 | | Marek Gorgon,
Slawomir Cichon,
Miroslaw Pac:
Real-time Handel-C Based Implementation of DV Decoder.
FPL 2005: 130-135 |
| 2004 |
|---|
| 2 | EE | Miroslaw Jablonski,
Marek Gorgon:
Handel-C implementation of Classical Component Labelling Algorithm.
DSD 2004: 387-393 |
| 2001 |
|---|
| 1 | EE | Marek Gorgon,
Jaromir Przybylo:
FPGA Based Controller for Heterogeneous Image Processing System.
DSD 2001: 453-457 |
