Mateusz Wrzesinski
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2006
1
EE
Marek Gorgon
, Mateusz Wrzesinski: Neural Network Implementation in Reprogrammable FPGA Devices - An Example for MLP.
ICAISC 2006
: 19-28
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Index
1
Marek Gorgon
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Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
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