| 2008 |
|---|
| 5 | EE | Masanori Furuta,
Takafumi Yamaji,
Takeshi Ueno,
Tetsuro Itakura:
An area-efficient sampling rate converter using negative feedback technique.
ISCAS 2008: 1922-1925 |
| 2006 |
|---|
| 4 | EE | Kazutaka Honda,
Masanori Furuta,
Shoji Kawahito:
A 1V 10b 125MSample/s A/D Converter Using Cascade Amp-Sharing and Capacitance Coupling Techniues.
ISCAS 2006: 1031-1034 |
| 3 | EE | Zheng Liu,
Masanori Furuta,
Shoji Kawahito:
Simultaneous Compensation of RC Mismatch and Clock Skew in Time-Interleaved S/H Circuits.
IEICE Transactions 89-C(6): 710-716 (2006) |
| 2005 |
|---|
| 2 | EE | Shoji Kawahito,
Kazutaka Honda,
Masanori Furuta,
Nobuhiro Kawai,
Daisuke Miyazaki:
Low-Power Design of High-Speed A/D Converters.
IEICE Transactions 88-C(4): 468-478 (2005) |
| 2003 |
|---|
| 1 | EE | Atsushi Suzuki,
Shoji Kawahito,
Daisuke Miyazaki,
Masanori Furuta:
A digitally skew correctable multi-phase clock generator using a master-slave DLL.
ISCAS (1) 2003: 105-108 |
