2008 |
11 | EE | Masanori Furuta,
Takafumi Yamaji,
Takeshi Ueno,
Tetsuro Itakura:
An area-efficient sampling rate converter using negative feedback technique.
ISCAS 2008: 1922-1925 |
10 | EE | Takeshi Ueno,
Tomohiko Ito,
Daisuke Kurose,
Takafumi Yamaji,
Tetsuro Itakura:
1.2 V, 24 mW/ch, 10 bit, 80 MSample/s Pipelined A/D Converters.
IEICE Transactions 91-A(2): 454-460 (2008) |
9 | EE | Akihide Sai,
Daisuke Kurose,
Takafumi Yamaji,
Tetsuro Itakura:
A Low-Power Low-Noise Clock Signal Generator for Next-Generation Mobile Wireless Terminals.
IEICE Transactions 91-A(2): 557-560 (2008) |
2007 |
8 | EE | Takeshi Ueno,
Takafumi Yamaji,
Tetsuro Itakura:
A 1.2-V, 12-bit, 200 MSample/s Current-Steering D/A Converter in 90-nm CMOS.
IEICE Transactions 90-A(2): 365-371 (2007) |
7 | EE | Osamu Watanabe,
Rui Ito,
Shigehito Saigusa,
Tadashi Arai,
Tetsuro Itakura:
A Fast fc Automatic Tuning Circuit with Wide Tuning Range for WCDMA Direct Conversion Receiver Systems.
IEICE Transactions 90-C(6): 1247-1252 (2007) |
2006 |
6 | EE | Takafumi Yamaji,
Tetsuro Itakura,
R. Ito,
Takeshi Ueno,
H. Okuni:
Balanced 3-phase analog signal processing for radio communications.
ISCAS 2006 |
5 | EE | Tomohiko Ito,
Daisuke Kurose,
Takeshi Ueno,
Takafumi Yamaji,
Tetsuro Itakura:
Low-Power Design of 10-bit 80-MSPS Pipeline ADCs.
IEICE Transactions 89-A(7): 2003-2008 (2006) |
2005 |
4 | EE | Takeshi Ueno,
Tetsuro Itakura:
A 0.9 V 1.5 mW Continuous-Time Modulator for W-CDMA.
IEICE Transactions 88-A(2): 461-468 (2005) |
3 | EE | Rui Ito,
Tetsuro Itakura,
Tadashi Arai:
Phase Compensation Technique for a Low-Power Transconductor.
IEICE Transactions 88-C(6): 1263-1266 (2005) |
2 | EE | Hiroshi Yoshida,
Takehiko Toyoda,
Makoto Arai,
Ryuichi Fujimoto,
Toshiya Mitomo,
Masato Ishii,
Rui Ito,
Tadashi Arai,
Tetsuro Itakura,
Hiroshi Tsurumi:
A Direct Conversion Receiver for W-CDMA Reducing Current Consumption to 31 mA.
IEICE Transactions 88-C(6): 1271-1274 (2005) |
2004 |
1 | EE | Tomohiko Ito,
Takafumi Yamaji,
Daisuke Kurose,
Tetsuro Itakura:
Capacitance Mismatch Evaluation for Low-power Pipeline ADC Design.
IEICE Electronic Express 1(3): 63-68 (2004) |