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Gennady Feygin

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1994
4 Gennady Feygin, P. Glenn Gulak, Paul Chow: Architectural Advances in the VLSI Implementation of Arithmetic Coding for Binary Image Compression. Data Compression Conference 1994: 254-263
3 Gennady Feygin, P. Glenn Gulak, Paul Chow: Minimizing Excess Code Length and VLSI Complexity in the Multiplication Free Approximation of Arithmetic Coding. Inf. Process. Manage. 30(6): 805-816 (1994)
1993
2 Gennady Feygin, P. Glenn Gulak, Paul Chow: Minimizing Error and VLSI Complexity in the Multiplication-Free Approximation of Arithmetic Coding. Data Compression Conference 1993: 118-127
1 Gennady Feygin, Paul Chow, P. Glenn Gulak, John Chappel, Grant Goodes, Oswin Hall, Ahmad Sayes, Satwant Singh, Michael B. Smith, Steven J. E. Wilton: A VLSI Implementation of a Cascade Viterbi Decoder with Traceback. ISCAS 1993: 1945-1948

Coauthor Index

1John Chappel [1]
2Paul Chow [1] [2] [3] [4]
3Grant Goodes [1]
4P. Glenn Gulak [1] [2] [3] [4]
5Oswin Hall [1]
6Ahmad Sayes [1]
7Satwant Singh [1]
8Michael B. Smith [1]
9Steven J. E. Wilton [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)