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Mei-Fang Chiang

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2009
3EEMei-Fang Chiang, Takumi Okamoto, Takeshi Yoshimura: Lagrangian relaxation based register placement for high-performance circuits. ISQED 2009: 511-516
2008
2EEHuang-Yu Chen, Mei-Fang Chiang, Yao-Wen Chang, Lumdo Chen, Brian Han: Full-Chip Routing Considering Double-Via Insertion. IEEE Trans. on CAD of Integrated Circuits and Systems 27(5): 844-857 (2008)
2006
1EEHuang-Yu Chen, Mei-Fang Chiang, Yao-Wen Chang, Lumdo Chen, Brian Han: Novel full-chip gridless routing considering double-via insertion. DAC 2006: 755-760

Coauthor Index

1Yao-Wen Chang [1] [2]
2Huang-Yu Chen [1] [2]
3Lumdo Chen [1] [2]
4Brian Han [1] [2]
5Takumi Okamoto [3]
6Takeshi Yoshimura [3]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)