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2000 | ||
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1 | EE | Ta-Chung Chang, Vikram Iyengar, Elizabeth M. Rudnick: A Biased Random Instruction Generation Environment for Architectural Verification of Pipelined Processors. J. Electronic Testing 16(1-2): 13-27 (2000) |
1 | Vikram Iyengar | [1] |
2 | Elizabeth M. Rudnick | [1] |