Krzysztof S. Berezowski

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4EERavishankar Rao, Sarma B. K. Vrudhula, Krzysztof S. Berezowski: Analytical results for design space exploration of multi-core processors employing thread migration. ISLPED 2008: 229-232
3EEKrzysztof S. Berezowski, Sarma B. K. Vrudhula: Multiple-Valued Logic Circuits Design Using Negative Differential Resistance Devices. ISMVL 2007: 24
2EEKrzysztof S. Berezowski, Sarma B. K. Vrudhula: Automatic Design of Binary and Multiple-Valued Logic Gates on RTD Series. DSD 2005: 139-143
1EEKrzysztof S. Berezowski: Transistor Chainning with Integrated Dynamic Folding for 1-D Leaf Cell Synthesis. DSD 2001: 422-429

Coauthor Index

1Ravishankar Rao [4]
2Sarma B. K. Vrudhula [2] [3] [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)