| 2008 |
|---|
| 4 | EE | Ravishankar Rao,
Sarma B. K. Vrudhula,
Krzysztof S. Berezowski:
Analytical results for design space exploration of multi-core processors employing thread migration.
ISLPED 2008: 229-232 |
| 2007 |
|---|
| 3 | EE | Krzysztof S. Berezowski,
Sarma B. K. Vrudhula:
Multiple-Valued Logic Circuits Design Using Negative Differential Resistance Devices.
ISMVL 2007: 24 |
| 2005 |
|---|
| 2 | EE | Krzysztof S. Berezowski,
Sarma B. K. Vrudhula:
Automatic Design of Binary and Multiple-Valued Logic Gates on RTD Series.
DSD 2005: 139-143 |
| 2001 |
|---|
| 1 | EE | Krzysztof S. Berezowski:
Transistor Chainning with Integrated Dynamic Folding for 1-D Leaf Cell Synthesis.
DSD 2001: 422-429 |
