| 2004 |
|---|
| 9 | EE | Ali Ahmadinia,
Christophe Bobda,
Marcus Bednara,
Jürgen Teich:
A New Approach for On-line Placement on Reconfigurable Devices.
IPDPS 2004 |
| 8 | EE | Ali Ahmadinia,
Christophe Bobda,
Marcus Bednara,
Jürgen Teich:
Real-Time Configuration Code Decompression for Dynamic FPGA Self-Reconfiguration.
IPDPS 2004 |
| 2003 |
|---|
| 7 | EE | Cornelia Grabbe,
Marcus Bednara,
Joachim von zur Gathen,
Jamshid Shokrollahi,
Jürgen Teich:
A High Performance VLIW Processor for Finite Field Arithmetic.
IPDPS 2003: 189 |
| 6 | EE | Cornelia Grabbe,
Marcus Bednara,
Jürgen Teich,
Joachim von zur Gathen,
Jamshid Shokrollahi:
FPGA designs of parallel high performance GF(2233) multipliers.
ISCAS (2) 2003: 268-271 |
| 5 | EE | Marcus Bednara,
Jürgen Teich:
Automatic Synthesis of FPGA Processor Arrays from Loop Algorithms.
The Journal of Supercomputing 26(2): 149-165 (2003) |
| 2002 |
|---|
| 4 | EE | Marcus Bednara,
Frank Hannig,
Jürgen Teich:
Generation of Distributed Loop Control.
Embedded Processor Design Challenges 2002: 154-170 |
| 3 | EE | Marcus Bednara,
M. Daldrup,
Joachim von zur Gathen,
Jamshid Shokrollahi,
Jürgen Teich:
Reconfigurable Implementation of Elliptic Curve Crypto Algorithms.
IPDPS 2002 |
| 2 | EE | Marcus Bednara,
M. Daldrup,
Jürgen Teich,
Joachim von zur Gathen,
Jamshid Shokrollahi:
Tradeoff analysis of FPGA based elliptic curve cryptography.
ISCAS (5) 2002: 797-800 |
| 2000 |
|---|
| 1 | EE | Marcus Bednara,
Oliver Beyer,
Jürgen Teich,
Rolf Wanka:
Tradeoff Analysis and Architecture Design of a Hybrid Hardware/Software Sorter.
ASAP 2000: 299-308 |
