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Arnaud Baixas

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2005
1 Jerome Quartana, Salim Renane, Arnaud Baixas, Laurent Fesquet, Marc Renaudin: GALS systems prototyping using multiclock FPGAs and asynchronous network-on-chips. FPL 2005: 299-304

Coauthor Index

1Laurent Fesquet [1]
2Jerome Quartana [1]
3Salim Renane [1]
4Marc Renaudin [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)