| 2001 |
|---|
| 5 | | Tetsuya Uemura,
Toshio Baba:
A Three-Valued D-Flip-Flop and Shift Register Using Multiple-Junction Surface Tunnel Transistors.
ISMVL 2001: 89-93 |
| 2000 |
|---|
| 4 | EE | Tetsuya Uemura,
Toshio Baba:
Demonstration of a Novel Multiple-Valued T-Gate Using Multiple-Junction Surface Tunnel Transistors and Its Application to Three-Valued Data Flip-Flop.
ISMVL 2000: 305-310 |
| 1999 |
|---|
| 3 | EE | Toshio Baba:
Development of Quantum Functional Devices for Multiple-Valued Logic Circuits.
ISMVL 1999: 2-8 |
| 1998 |
|---|
| 2 | EE | Toshio Baba,
Tetsuya Uemura:
Development of InGaAs-Based Multiple-Junction Surface Tunnel Transistors for Multiple-Valued Logic Circuits.
ISMVL 1998: 7-12 |
| 1997 |
|---|
| 1 | EE | Toshio Baba,
Tetsuya Uemura:
Multiple-Junction Surface Tunnel Transistors for Multiple-Valued Logic Circuits .
ISMVL 1997: 41-46 |
