2009 |
14 | EE | Rola Kassem,
Mikaël Briday,
Jean-Luc Béchennec,
Yvon Trinquet,
Guillaume Savaton:
Instruction set simulator generation using HARMLESS, a new hardware architecture description language.
SimuTools 2009: 24 |
2006 |
13 | EE | Jean-Luc Béchennec,
Mikaël Briday,
Sébastien Faucou,
Yvon Trinquet:
Trampoline An Open Source Implementation of the OSEK/VDX RTOS Specification.
ETFA 2006: 62-69 |
2002 |
12 | EE | Nathalie Drach,
Jean-Luc Béchennec,
Olivier Temam:
Increasing hardware data prefetching performance using the second-level cache.
Journal of Systems Architecture 48(4-5): 137-149 (2002) |
2000 |
11 | EE | Alexis Vartanian,
Jean-Luc Béchennec,
Nathalie Drach-Temam:
The Best Distribution for a Parallel OpenGL 3D Engine with Texture Caches.
HPCA 2000: 399-408 |
1999 |
10 | EE | Claude Limousin,
Alexis Vartanian,
Jean-Luc Béchennec:
PopSPY: A PowerPC Instrumentation Tool for Multiprocessor Simulation.
Euro-Par 1999: 262-265 |
9 | EE | Julien Sébot,
Alexis Vartanian,
Jean-Luc Béchennec,
Nathalie Drach-Temam:
A Parallel Algorithm for 3D Geometry Transformations in OpenGL.
Euro-Par 1999: 659-662 |
8 | EE | Alexis Vartanian,
Jean-Luc Béchennec,
Nathalie Drach-Temam:
Two Schemes to Improve the Performance of a Sort-Last 3D Parallel Rendering Machine with Texture Caches.
Euro-Par 1999: 757-760 |
1998 |
7 | EE | Alexis Vartanian,
Jean-Luc Béchennec,
Nathalie Drach-Temam:
Evaluation of High Performance Multicache Parallel Texture Mapping.
International Conference on Supercomputing 1998: 289-296 |
1997 |
6 | EE | A. Pavlov,
Jean-Luc Béchennec,
Daniel Etiemble:
Performance evaluation of the memory hierarchy of a desktop PC using commodity chips with specific traces.
EUROMICRO 1997: 409- |
1993 |
5 | | Franck Cappello,
Jean-Luc Béchennec,
Franck Delaplace,
Cécile Germain,
Jean-Louis Giavitto,
Vincent Néri,
Daniel Etiemble:
Balanced Distributed Memory Parallel Computers.
ICPP 1993: 72-76 |
4 | | F. Capello,
Jean-Luc Béchennec,
Franck Delaplace,
Damien Gautier de Lahaut,
Cécile Germain,
Jean-Louis Giavitto,
Vincent Néri,
Daniel Etiemble:
A Parralel Architecture Based on Compiled Communication Schemes.
PARCO 1993: 371-378 |
3 | | Cécile Germain,
Jean-Luc Béchennec,
Daniel Etiemble,
Jean-Paul Sansonnet:
A Communication Architecture for a Massively Parallel Message-Passing Multicomputer.
J. Parallel Distrib. Comput. 19(4): 338-348 (1993) |
1992 |
2 | | Franck Cappello,
Jean-Luc Béchennec,
Jean-Louis Giavitto:
PTAH: Introduction to a New Parallel Architecture for Highly Numeric Processing.
PARLE 1992: 81-96 |
1987 |
1 | | Pascal Faudemay,
Daniel Etiemble,
Jean-Luc Béchennec,
He Hé:
The Database Processor 'RAPID'.
IWDM 1987: 171-187 |