| 1990 |
|---|
| 7 | EE | Robert W. Atherton,
Linda F. Atherton,
Mark Pool:
Detailed simulation for semiconductor manufacturing.
Winter Simulation Conference 1990: 659-663 |
| 1986 |
|---|
| 6 | | Judith E. Dayhoff,
Robert W. Atherton:
Financial Impact of Tester Reliability Improvements.
ITC 1986: 195-204 |
| 1985 |
|---|
| 5 | | Judith E. Dayhoff,
Robert W. Atherton:
Financial Implications of a Detailed Analysis of Test Floor Operations.
ITC 1985: 23-32 |
| 4 | | Robert W. Atherton,
John L. Mudge:
Microprocessor Speed Optimization Using Pattern-Recognition Analysis of Parametric Test Data.
ITC 1985: 938-948 |
| 1984 |
|---|
| 3 | | Robert W. Atherton,
Leonard Ekkelkamp,
Chuck Schmitz:
Logic Device Characterization Using Computer-Aided Test and Analysis.
ITC 1984: 367-383 |
| 1983 |
|---|
| 2 | | Robert W. Atherton,
David M. Campbell:
Use of In-Fab Parametric Testing for Process Control of Semiconductor Manufacturing.
ITC 1983: 238-247 |
| 1 | | Robert W. Atherton,
Alfred H. Miller Jr.,
Judith E. Dayhoff:
Operations Management and Analysis in the Management of Electronic Testing.
ITC 1983: 418-427 |
