| |
| 2008 | ||
|---|---|---|
| 3 | EE | Uthman Alsaiari, Resve A. Saleh: Partitioning for Selective Flip-Flop Redundancy in Sequential Circuits. ISQED 2008: 798-803 |
| 2007 | ||
| 2 | EE | Uthman Alsaiari, Resve Saleh: Power, Delay and Yield Analysis of BIST/BISR PLAs Using Column Redundancy. ISQED 2007: 703-710 |
| 2006 | ||
| 1 | EE | Uthman Alsaiari, Resve Saleh: Testable and self-repairable structured logic design. ISCAS 2006 |
| 1 | Resve A. Saleh (Resve Saleh, Res Saleh) | [1] [2] [3] |