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Yuan-Chu Yu

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2008
3EEChin-Teng Lin, Yuan-Chu Yu, Lan-Da Van: Cost-Effective Triple-Mode Reconfigurable Pipeline FFT/IFFT/2-D DCT Processor. IEEE Trans. VLSI Syst. 16(8): 1058-1071 (2008)
2007
2EELan-Da Van, Chin-Teng Lin, Yuan-Chu Yu: VLSI Architecture for the Low-Computation Cycle and Power-Efficient Recursive DFT/IDFT Design. IEICE Transactions 90-A(8): 1644-1652 (2007)
2006
1EEChin-Teng Lin, Yuan-Chu Yu, Lan-Da Van: A low-power 64-point FFT/IFFT design for IEEE 802.11a WLAN application. ISCAS 2006

Coauthor Index

1Chin-Teng Lin [1] [2] [3]
2Lan-Da Van [1] [2] [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)