Haile Yu

List of publications from the DBLP Bibliography Server - FAQ

2008

3 EE Haile Yu, Yuk Hei Chan, Philip Heng Wai Leong: FPGA interconnect design using logical effort. FPGA 2008: 257

2 EE Haile Yu, Yuk Hei Chan, Philip Heng Wai Leong: FPGA interconnect design using logical effort. FPL 2008: 447-450

1 EE Haile Yu: FPGA interconnect sizing using extended logical effort model. FPL 2008: 695-696

2008
3	EE	Haile Yu, Yuk Hei Chan, Philip Heng Wai Leong: FPGA interconnect design using logical effort. FPGA 2008: 257
2	EE	Haile Yu, Yuk Hei Chan, Philip Heng Wai Leong: FPGA interconnect design using logical effort. FPL 2008: 447-450
1	EE	Haile Yu: FPGA interconnect sizing using extended logical effort model. FPL 2008: 695-696

Coauthor Index