Greg M. Yeric

List of publications from the DBLP Bibliography Server - FAQ

1993

1 EE Victor Martin Agostinelli Jr., Greg M. Yeric, A. F. Tasch Jr.: Universal MOSFET hole mobility degradation models for circuit simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 12(3): 439-445 (1993)

1993
1	EE	Victor Martin Agostinelli Jr., Greg M. Yeric, A. F. Tasch Jr.: Universal MOSFET hole mobility degradation models for circuit simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 12(3): 439-445 (1993)

Coauthor Index