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| 2007 | ||
|---|---|---|
| 2 | EE | Sying-Jyan Wang, Tung-Hua Yeh: High-level test synthesis for delay fault testability. DATE 2007: 45-50 |
| 1 | EE | Po-Chang Tsai, Sying-Jyan Wang, Ching-Hung Lin, Tung-Hua Yeh: Test Data Compression for Minimum Test Application Time. J. Inf. Sci. Eng. 23(6): 1901-1909 (2007) |
| 1 | Ching-Hung Lin | [1] |
| 2 | Po-Chang Tsai | [1] |
| 3 | Sying-Jyan Wang | [1] [2] |